Paper 2023/716
Towards High-speed ASIC Implementations of Post-Quantum Cryptography
, Department of Computer Systems, Tallinn University of Technology, EstoniaAbstract
In this brief, we realize different architectural techniques towards improving the performance of post-quantum cryptography (PQC) algorithms when implemented as hardware accelerators on an application-specific integrated circuit (ASIC) platform. Having SABER as a case study, we designed a 256-bit wide architecture geared for high-speed cryptographic applications that incorporates smaller and distributed SRAM memory blocks. Moreover, we have adapted the building blocks of SABER to process 256-bit words. We have also used a buffer technique for efficient polynomial coefficient multiplications to reduce the clock cycle count. Finally, double-sponge functions are combined serially (one after another) in a high-speed KECCAK core to improve the hash operations of SHA/SHAKE. For key-generation, encapsulation, and decapsulation operations of SABER, our 256-bit wide accelerator with a single sponge function is 1.71x, 1.45x, and 1.78x faster compared to the raw clock cycle count of a serialized SABER design. Similarly, our 256-bit implementation with double-sponge functions takes 1.08x, 1.07x & 1.06x fewer clock cycles compared to its single-sponge counterpart. The studied optimization techniques are not specific to SABER - they can be utilized for improving the performance of other lattice-based PQC accelerators.
Metadata
- Available format(s)
-
PDF
- Category
- Implementation
- Publication info
- Published elsewhere. IEEE
- DOI
- 10.1109/TCSII.2023.3273821
- Keywords
- PQCASIC designhardware acceleratorcryptocoreSABER
- Contact author(s)
-
malik imran @ taltech ee
aikata @ iaik tugraz at
sujoy sinharoy @ iaik tugraz at
samuel pagliarini @ taltech ee - History
- 2023-05-22: approved
- 2023-05-18: received
- See all versions
- Short URL
- https://ia.cr/2023/716
- License
-
CC BY-NC
BibTeX
@misc{cryptoeprint:2023/716,
author = {Malik Imran and Aikata Aikata and Sujoy Sinha Roy and Samuel pagliarini},
title = {Towards High-speed ASIC Implementations of Post-Quantum Cryptography},
howpublished = {Cryptology ePrint Archive, Paper 2023/716},
year = {2023},
doi = {10.1109/TCSII.2023.3273821},
note = {\url{https://eprint.iacr.org/2023/716}},
url = {https://eprint.iacr.org/2023/716}
}
